1. Field of the Invention
The present invention relates to oscillator circuits, particularly high-frequency oscillators.
2. State of the Art
Frequency synthesizers are used to provide high-frequency signals within, for example, various types of communications equipment and measurement instrumentation. As is well known, at microwave frequencies and above, the phase noise generated by reference oscillators included within such synthesizers can significantly degrade the spectral purity of the high-frequency output signal. Phase noise, i.e., frequency jitter, corresponds to the noise power generated by the synthesizer at frequencies other than the desired output frequency. Phase noise in oscillators is a long-standing problem as described, for example, in U.S. Pat. Nos. 6,064,244 and 5,341,110, incorporated herein by reference. Further references include the following, also incorporated herein by reference: Rhea, Randall W., Oscillator Design and Computer Simulation, McGraw Hill, 1995; Munt, Roger, xe2x80x9cDesigning Oscillators for Spectral Purity,xe2x80x9d Microwave and RF, July 1984, p. 133 et seq.; and Abidi, A. A., xe2x80x9cHow Phase Noise Appears in Oscillators,xe2x80x9d in Analog Circuit Design: RF A/D Converters, Sensor and Actuator Interfaces, Low-Noise Oscillators, PLLs, and Synthesizers, R. J. van de Plassche, J. H. Huijsing, and W. Sansen, Eds., Boston: Kluwer, 1997.
A basic oscillator circuit is shown in FIG. 1. An amplifier 101 has its output signal 103 (which is also the output signal of the oscillator) coupled to a resonator 105. An output signal 107 of the resonator is fed back through a delay circuit 109 to form the input signal 111 of the amplifier. Oscillation is established when two conditions are met: 1. The open-loop gain at node N is unity; and 2. The open-loop phase is 2 nxcfx80, where n is an integer.
Phase noise in oscillators, which has been well-documented in the forego- ing references and elsewhere, can be expressed as dxcex8/dxcfx89.
In one oscillator circuit of known topology, shown in FIG. 2, two NPN transistors are used. A transistor Q1 is an oscillator transistor, and a transistor Q2 is a buffer transistor.
The collector of the oscillator transistor Q1 is coupled to a supply voltage through an inductor L3 (which may be realized in strip-line form). The emitter is coupled to ground through a parallel RC combination (R5, C1). The base is coupled through resistor R9 to a bias network including resistor R3 and resistor R4, coupled to power and to ground, respectively.
The collector of the buffer transistor Q2 is coupled to the supply voltage through an RF choke L1. Also coupled to the collector is a DC blocking capacitor C3, which forms the RF output signal of the oscillator circuit. The emitter of the buffer transistor Q2 is coupled to ground through a parallel RC combination of R6 and C4. The base of the buffer transistor Q2 is coupled through capacitor C2 to the collector of transistor Q1, and is connected to bias resistors R7 and R8.
An oscillator resonator includes a capacitor C5, an inductor L2 (which may be realized as a strip line), a varactor diode D and a capacitor C6, coupled in a xe2x80x9cpixe2x80x9d configuration as shown. The inductor and the varactor diode are connected in parallel to ground and occupy the xe2x80x9clegsxe2x80x9d of the pi configuration. The capacitors occupy the extended xe2x80x9carmsxe2x80x9d of the pi configuration. A tuning voltage VTUNE is applied to the varactor diode, through a series inductor L3 and shunt capacitor Cbp. Note that, through the capacitors C5 and C6, the oscillator resonator is capacitively coupled to the collector of the oscillator transistor Q1, on the one hand, and to the base of the oscillator transistor Q1 on the other hand. This capacitive coupling minimizes loading of the resonator.
In the circuit of FIG. 2, oscillations will occur when the open-loop phase delay is 2 nxcfx80, where n is an integer.
At microwave frequencies, the phase delay through Q1 is non-ideal. Whereas the desired phase delay is 180xc2x0, for example, because of parasitics, the phase delay obtained in practice may be in the range of 110 to 135xc2x0, for example. Various different phase compensation techniques may be applied to increase the phase shift, including, for example, the use of higher-bandwidth devices such as FETs, use of a delay line, detuning the resonator to align the composite phase correctly, etc. Each of the foregoing alternatives have disadvantages. FETs have poor 1/f noise. Delay lines are bulky. Detuning the resonator for more phase shift lowers the quality factor and consequently degrades phase noise. Hence, none of these alternatives is particularly attractive.
The circuit in FIG. 2 presents a complex impedance and therefore has the potential to affect both RF gain and phase shift, allowing the designer to select a trade-off between gain and phase shift. Commonly, where the technique of detuning the resonator is used for phase compensation, C1 is chosen to function as a bypass at the frequency of interest, with the result that gain is maximized and phase shift is negligible. A plot of phase noise in such a circuit is shown in FIG. 3. At 100kHz, phase noise is shown to be xe2x88x92110.08 dBc/Hz.
The open-loop gain and phase characteristics of the circuit are shown in FIG. 4. Note that the maximum gain (at the xe2x80x9csweet spotxe2x80x9d of the resonator) is about 3.5 dB, substantially greater than unity gain required for oscillation. This increased gain is needed because, in operation, the resonator will be detuned (i.e., the resonance moved away from the frequency of interest) for purposes of phase compensation as previously described. With C1 chosen to function as a bypass, the resulting phase characteristic gives what has been regarded as an acceptable effective Q factor for most applications. For signals requiring high spectral purity, such as some 2 G and 3 G cellular radio telephone signals, however, continued noise improvement has been sought.
Other techniques used to lower phase noise include increasing the Q factor of the resonator and operating at higher voltage. Increasing the Q factor of the resonator involves increasing the ratio of L to C. As L is increased, the size of resonator increases. As C is decreased and more closely approaches the range of parasitic capacitances in the circuit, the tuning range is reduced. Operating at higher voltage increases power dissipation. Again, these alternatives are not particularly attractive.
What is needed, then, is a technique that achieves substantial phase noise improvement at minimal expense.
The present invention, generally speaking, allows for a substantial reduction in oscillator phase noise by modifying the transfer function of a portion of the oscillator, e.g., by adding a zero to the transfer function. Modifying the transfer function reduces the open-loop gain of the oscillator but achieves a desired phase compensation, allowing the oscillator to be operated at the resonance of the resonator instead of off resonance. In an exemplary embodiment, the transfer function is modified by choosing a capacitance value such that, instead of operating as a bypass at the frequency of interest, adds a zero to the transfer function of the oscillator and causes a change in frequency characteristics, achieving an increase in the effective Q of the oscillator. This increase in effective Q translates directly into reduced phase noise. Phase noise improvement in the range of 3dB has been demonstrated.